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XCore XS1-G4
The XS1-G4 is a processor designed by XMOS. It is a 32-bit quad-core processor, where each core runs up to 8 concurrent threads. It was available as of Autumn 2008 running at 400 MHz. Each thread can run at up to 100 MHz; four threads follow each other through the pipeline, resulting in a top speed of 1.6 GIPS for four cores if 16 threads are running. The XS1-G4 is a distributed memory multi core processor, requiring the end user and compiler to deal with data distribution. When more than 4 threads execute, the 400 MIPS of each core is equally distributed over all active threads. This allows the use of extra threads in order to hide latency.
== Description ==
The XS1-G4 comprises four cores and a switch. Each core has a data path, a memory, and register banks for eight threads. Threads running on different cores can communicate with each other by exchanging messages through the switches. Switches of multiple G4s can be connected to form a larger system. The instruction set supports the notion of a channel, a virtual connection between two threads. Channels are supported between threads on a core, between cores on a single chip through a XSwitch, or between cores in the same system if the switches are connected by means of physical links.
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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